The Impact of LCE and PAMDLE Regarding Different CMOS ICs Nodes and High Temperatures

• Main Authors: Egon Henrique Salerno Galembeck, Christian Renaux, Jacobus Willibrordus Swart, Denis Flandre, Salvador Pinillos Gimenez
• Format: Article
• Language: English
• Published: IEEE 2021-01-01
• Series: IEEE Journal of the Electron Devices Society
• Subjects: Diamond layout style for MOSFET; High temperature; LCE; PAMDLE
• Online Access: https://ieeexplore.ieee.org/document/9397259/

This paper describes the influence of Longitudinal Corner Effect (LCE effect) and PArallel Connection of Metal&#x2013;Oxide&#x2013;Semiconductor Field-Effect Transistors (MOSFETs) with Different Channel Lengths Effect (PAMDLE effect) of Diamond (hexagonal gate shape) MOSFET in different Complementary Metal-Oxide-Semiconductor (CMOS) Integrated Circuits (ICs) technologies (180nm-Bulk and <inline-formula> <tex-math notation="LaTeX">$1\mu \text{m}$ </tex-math></inline-formula>-Silicon-On-Insulator, SOI) and in a wide range of high-temperatures (from 300K to 573K). The results have shown (average gains of Diamond MOSFET in relation to standard MOSFET: 60&#x0025; for saturation drain current, 51&#x0025; for transconductance, 10&#x0025; for transconductance-over-drain current ratio etc.) that LCE and PAMDLE effects tend to be similar for CMOS ICs technological nodes used and the different high temperatures. Therefore, we can conclude, for the first time, that LCE and PAMDLE effects are kept active in different CMOS ICs technological nodes and when the Diamond MOSFET is exposed at high temperatures.