Multilayer, Stacked Spiral Copper Inductors on Silicon with Micro-Henry Inductance Using Single-Level Lithography

• Main Authors: Timothy Reissman, Joon-Sik Park, Ephrahim Garcia
• Format: Article
• Language: English
• Published: Hindawi Limited 2012-01-01
• Series: Active and Passive Electronic Components
• Online Access: http://dx.doi.org/10.1155/2012/871620

We present copper structures composed of multilayer, stacked inductors (MLSIs) with tens of micro-Henry inductance for use in low frequency (sub 100 MHz), power converter technology. Unique to this work is the introduction of single-level lithography over the traditional two-level approach to create each inductor layer. The result is a simplified fabrication process which results in a reduction in the number of lithography steps per inductor (metal) layer and a reduction in the necessary alignment precision. Additionally, we show that this fabrication process yields strong adhesion amongst the layers, since even after a postprocess abrasion technique at the inner diameter of the inductors, no shearing occurs and connectivity is preserved. In total, three separate structures were fabricated using the single-level lithography approach, each with a three-layered, stacked inductor design but with varied geometries. Measured values for each of the structures were extracted, and the following results were obtained: inductance values of 24.74, 17.25, and 24.74 μH, self-resonances of 9.87, 5.72, and 10.58 MHz, and peak quality factors of 2.26, 2.05, and 4.6, respectively. These values are in good agreement with the lumped parameter model presented.