Nonlinear optimized Fast Locking PLLs Using Genetic Algorithm

Abstract— This paper presents a novel approach to obtain fast locking PLL by embedding a nonlinear element in the loop of PLL. The nonlinear element has a general parametric Taylor expansion. Using genetic algorithm (GA) we try to optimize the nonlinear element parameters. Embedding optimized nonlin...

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Main Authors: H. Miar- Naimi, M. Zabihi
Format: Article
Language:English
Published: Iran University of Science and Technology 2009-12-01
Series:Iranian Journal of Electrical and Electronic Engineering
Subjects:
PLL
Online Access:http://ijeee.iust.ac.ir/browse.php?a_code=A-10-175-1&slc_lang=en&sid=1
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spelling doaj-2e381d57ca254dc1981a71a0bbe1c0c72020-11-24T22:34:26ZengIran University of Science and TechnologyIranian Journal of Electrical and Electronic Engineering1735-28272383-38902009-12-0154223229Nonlinear optimized Fast Locking PLLs Using Genetic AlgorithmH. Miar- Naimi0M. Zabihi1 Abstract— This paper presents a novel approach to obtain fast locking PLL by embedding a nonlinear element in the loop of PLL. The nonlinear element has a general parametric Taylor expansion. Using genetic algorithm (GA) we try to optimize the nonlinear element parameters. Embedding optimized nonlinear element in the loop shows enhancements in speed and stability of PLL. To evaluate the performance of the proposed structure, various tests performed and results compared with standard phase locked loop. The tests and results show the superior performance of the proposed PLL.http://ijeee.iust.ac.ir/browse.php?a_code=A-10-175-1&slc_lang=en&sid=1PLL Genetic Algorithm Nonlinear ElementFast lock
collection DOAJ
language English
format Article
sources DOAJ
author H. Miar- Naimi
M. Zabihi
spellingShingle H. Miar- Naimi
M. Zabihi
Nonlinear optimized Fast Locking PLLs Using Genetic Algorithm
Iranian Journal of Electrical and Electronic Engineering
PLL
Genetic Algorithm
Nonlinear Element
Fast lock
author_facet H. Miar- Naimi
M. Zabihi
author_sort H. Miar- Naimi
title Nonlinear optimized Fast Locking PLLs Using Genetic Algorithm
title_short Nonlinear optimized Fast Locking PLLs Using Genetic Algorithm
title_full Nonlinear optimized Fast Locking PLLs Using Genetic Algorithm
title_fullStr Nonlinear optimized Fast Locking PLLs Using Genetic Algorithm
title_full_unstemmed Nonlinear optimized Fast Locking PLLs Using Genetic Algorithm
title_sort nonlinear optimized fast locking plls using genetic algorithm
publisher Iran University of Science and Technology
series Iranian Journal of Electrical and Electronic Engineering
issn 1735-2827
2383-3890
publishDate 2009-12-01
description Abstract— This paper presents a novel approach to obtain fast locking PLL by embedding a nonlinear element in the loop of PLL. The nonlinear element has a general parametric Taylor expansion. Using genetic algorithm (GA) we try to optimize the nonlinear element parameters. Embedding optimized nonlinear element in the loop shows enhancements in speed and stability of PLL. To evaluate the performance of the proposed structure, various tests performed and results compared with standard phase locked loop. The tests and results show the superior performance of the proposed PLL.
topic PLL
Genetic Algorithm
Nonlinear Element
Fast lock
url http://ijeee.iust.ac.ir/browse.php?a_code=A-10-175-1&slc_lang=en&sid=1
work_keys_str_mv AT hmiarnaimi nonlinearoptimizedfastlockingpllsusinggeneticalgorithm
AT mzabihi nonlinearoptimizedfastlockingpllsusinggeneticalgorithm
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