Intermediate Frequency Digital Receiver Based on Multi-FPGA System

Intermediate Frequency Digital Receiver Based on Multi-FPGA System

Aiming at high-cost, large-size, and inflexibility problems of traditional analog intermediate frequency receiver in the aerospace telemetry, tracking, and command (TTC) system, we have proposed a new intermediate frequency (IF) digital receiver based on Multi-FPGA system in this paper. Digital beam...

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Main Authors: Chengchang Zhang, Lihong Zhang
Format: Article
Language:English
Published: Hindawi Limited 2016-01-01
Series:Journal of Electrical and Computer Engineering
Online Access:http://dx.doi.org/10.1155/2016/6123832
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spelling doaj-2a1d0ea675ff47a09e7b7c6b4ec3ecba2021-07-02T03:35:38ZengHindawi LimitedJournal of Electrical and Computer Engineering2090-01472090-01552016-01-01201610.1155/2016/61238326123832Intermediate Frequency Digital Receiver Based on Multi-FPGA SystemChengchang Zhang0Lihong Zhang1Department of Electrical Engineering, College of Electronic Engineering, Chongqing University of Posts and Telecommunications, Chongqing, ChinaElectrical and Computer Engineering, Faculty of Engineering and Applied Science, Memorial University, St. John’s, NL, CanadaAiming at high-cost, large-size, and inflexibility problems of traditional analog intermediate frequency receiver in the aerospace telemetry, tracking, and command (TTC) system, we have proposed a new intermediate frequency (IF) digital receiver based on Multi-FPGA system in this paper. Digital beam forming (DBF) is realized by coordinated rotation digital computer (CORDIC) algorithm. An experimental prototype has been developed on a compact Multi-FPGA system with three FPGAs to receive 16 channels of IF digital signals. Our experimental results show that our proposed scheme is able to provide a great convenience for the design of IF digital receiver, which offers a valuable reference for real-time, low power, high density, and small size receiver design.http://dx.doi.org/10.1155/2016/6123832
collection DOAJ
language English
format Article
sources DOAJ
author Chengchang Zhang
Lihong Zhang
spellingShingle Chengchang Zhang
Lihong Zhang
Intermediate Frequency Digital Receiver Based on Multi-FPGA System
Journal of Electrical and Computer Engineering
author_facet Chengchang Zhang
Lihong Zhang
author_sort Chengchang Zhang
title Intermediate Frequency Digital Receiver Based on Multi-FPGA System
title_short Intermediate Frequency Digital Receiver Based on Multi-FPGA System
title_full Intermediate Frequency Digital Receiver Based on Multi-FPGA System
title_fullStr Intermediate Frequency Digital Receiver Based on Multi-FPGA System
title_full_unstemmed Intermediate Frequency Digital Receiver Based on Multi-FPGA System
title_sort intermediate frequency digital receiver based on multi-fpga system
publisher Hindawi Limited
series Journal of Electrical and Computer Engineering
issn 2090-0147
2090-0155
publishDate 2016-01-01
description Aiming at high-cost, large-size, and inflexibility problems of traditional analog intermediate frequency receiver in the aerospace telemetry, tracking, and command (TTC) system, we have proposed a new intermediate frequency (IF) digital receiver based on Multi-FPGA system in this paper. Digital beam forming (DBF) is realized by coordinated rotation digital computer (CORDIC) algorithm. An experimental prototype has been developed on a compact Multi-FPGA system with three FPGAs to receive 16 channels of IF digital signals. Our experimental results show that our proposed scheme is able to provide a great convenience for the design of IF digital receiver, which offers a valuable reference for real-time, low power, high density, and small size receiver design.
url http://dx.doi.org/10.1155/2016/6123832
work_keys_str_mv AT chengchangzhang intermediatefrequencydigitalreceiverbasedonmultifpgasystem
AT lihongzhang intermediatefrequencydigitalreceiverbasedonmultifpgasystem
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