A Novel Grid Synchronization Method Based on Hybrid Filter Under Distorted Voltage Conditions

• Main Authors: Nanmu Hui, Zongan Luo, Yingying Feng, Xiaowei Han
• Format: Article
• Language: English
• Published: IEEE 2020-01-01
• Series: IEEE Access
• Subjects: Novel adaptive notch filter (NANF); harmonic; phase-locked loop (PLL); dc offset; cascaded delay signal cancellation (CDSC)
• Online Access: https://ieeexplore.ieee.org/document/9042331/

The phase-locked accuracy of conventional phase-locked method is reduced when the grid voltage contains fundamental frequency negative sequence(FFNS) component, harmonic component, and DC offset component. Aiming at this problem, a novel adaptive notch filter (NANF) is proposed, and a dual NANF (DNANF) structure is designed to eliminate the FFNS component and extract the fundamental frequency positive sequence(FFPS) component based on NANF. Furthermore, dcDNANF with DC offset rejection capability is proposed by adopting DNANF. Then a novel hybrid filter in dq-frame is designed by combining dcDNANF and the cascaded delay signal cancellation operator filter whose delay parameters are 4 and 24 in dq-frame (dqCDSC4,24). Meanwhile, a new SRF-PLL design method is proposed based on the novel hybrid filter. This proposed method employs dqCDSC4,24 to separate the positive and negative sequences of the voltage and eliminate the high frequency harmonics in the grid voltage, and uses dcDNANF to reject the DC offset, so as to achieve the accurate acquisition of the fundamental voltage information under distortion and unbalanced grid. Simulation and experimental results show that compared with the conventional SRF-PLL methods, the proposed method can obtain faster phase tracking speed, better phase-locked effect, faster dynamic response, and better stability.