FPGA realization of Farrow structure for sampling rate change
In numerous implementations of modern telecommunications and digital audio systems there is a need for sampling rate change of the system input signal. When the relation between signal input and output sampling frequencies is a fraction of two large integer numbers, Lagrange interpolation b...
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Faculty of Technical Sciences in Cacak
2016-01-01
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doaj-242e1f5d182441218c119a9becdf391a2020-11-24T20:43:54ZengFaculty of Technical Sciences in CacakSerbian Journal of Electrical Engineering1451-48692217-71832016-01-01131839310.2298/SJEE1601083M1451-48691601083MFPGA realization of Farrow structure for sampling rate changeMarković Bogdan0Ćertić Jelena1Bitgear Wireless Design Services LLC, BelgradeSchool of Electrical Engineering, BelgradeIn numerous implementations of modern telecommunications and digital audio systems there is a need for sampling rate change of the system input signal. When the relation between signal input and output sampling frequencies is a fraction of two large integer numbers, Lagrange interpolation based on Farrow structure can be used for the efficient realization of the resample block. This paper highlights efficient realization and estimation of necessary resources for polynomial cubic Lagrange interpolation in the case of the demand for the signal sampling rate change with the factor 160/147 on Field-Programmable Gate Array architecture (FPGA). [Projekat Ministarstva nauke Republike Srbije, br. TR-32023 i br. TR-32028]http://www.doiserbia.nb.rs/img/doi/1451-4869/2016/1451-48691601083M.pdfFarrow structureLagrange interpolationFinite Impulse Response(FIR)Field-Programmable Gate Array (FPGA)Sampling Rate Change (SCR)implementationEstimation of necessary resources |
collection |
DOAJ |
language |
English |
format |
Article |
sources |
DOAJ |
author |
Marković Bogdan Ćertić Jelena |
spellingShingle |
Marković Bogdan Ćertić Jelena FPGA realization of Farrow structure for sampling rate change Serbian Journal of Electrical Engineering Farrow structure Lagrange interpolation Finite Impulse Response(FIR) Field-Programmable Gate Array (FPGA) Sampling Rate Change (SCR) implementation Estimation of necessary resources |
author_facet |
Marković Bogdan Ćertić Jelena |
author_sort |
Marković Bogdan |
title |
FPGA realization of Farrow structure for sampling rate change |
title_short |
FPGA realization of Farrow structure for sampling rate change |
title_full |
FPGA realization of Farrow structure for sampling rate change |
title_fullStr |
FPGA realization of Farrow structure for sampling rate change |
title_full_unstemmed |
FPGA realization of Farrow structure for sampling rate change |
title_sort |
fpga realization of farrow structure for sampling rate change |
publisher |
Faculty of Technical Sciences in Cacak |
series |
Serbian Journal of Electrical Engineering |
issn |
1451-4869 2217-7183 |
publishDate |
2016-01-01 |
description |
In numerous implementations of modern telecommunications and digital audio
systems there is a need for sampling rate change of the system input signal.
When the relation between signal input and output sampling frequencies is a
fraction of two large integer numbers, Lagrange interpolation based on Farrow
structure can be used for the efficient realization of the resample block.
This paper highlights efficient realization and estimation of necessary
resources for polynomial cubic Lagrange interpolation in the case of the
demand for the signal sampling rate change with the factor 160/147 on
Field-Programmable Gate Array architecture (FPGA). [Projekat Ministarstva
nauke Republike Srbije, br. TR-32023 i br. TR-32028] |
topic |
Farrow structure Lagrange interpolation Finite Impulse Response(FIR) Field-Programmable Gate Array (FPGA) Sampling Rate Change (SCR) implementation Estimation of necessary resources |
url |
http://www.doiserbia.nb.rs/img/doi/1451-4869/2016/1451-48691601083M.pdf |
work_keys_str_mv |
AT markovicbogdan fpgarealizationoffarrowstructureforsamplingratechange AT certicjelena fpgarealizationoffarrowstructureforsamplingratechange |
_version_ |
1716818600445083648 |