Dual Mode Logic—Design for Energy Efficiency and High Performance
The recently proposed dual mode logic (DML) gates family enables a very high level of energy-delay optimization flexibility at the gate level. In this paper, this flexibility is utilized to improve energy efficiency and performance of combinatorial circuits by manipulating their critical and noncrit...
| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
IEEE
2013-01-01
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| Series: | IEEE Access |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/6514913/ |