Reconfigurable Binary Neural Network Accelerator with Adaptive Parallelism Scheme

Reconfigurable Binary Neural Network Accelerator with Adaptive Parallelism Scheme

Binary neural networks (BNNs) have attracted significant interest for the implementation of deep neural networks (DNNs) on resource-constrained edge devices, and various BNN accelerator architectures have been proposed to achieve higher efficiency. BNN accelerators can be divided into two categories...

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Bibliographic Details
Main Authors: Jaechan Cho, Yongchul Jung, Seongjoo Lee, Yunho Jung
Format: Article
Language:English
Published: MDPI AG 2021-01-01
Series:Electronics
Subjects:
artificial intelligence (AI)
binary neural network (BNN)
FPGA
machine learning
pattern recognition
VLSI
Online Access:https://www.mdpi.com/2079-9292/10/3/230

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