A New Floating and Tunable Capacitance Multiplier With Large Multiplication Factor

A New Floating and Tunable Capacitance Multiplier With Large Multiplication Factor

This paper presents a CMOS floating and tunable capacitance multiplier with a very large multiplication factor. The proposed design uses CCII and OTAs designed using MOSFETs biased in subthreshold region to provide low power consumption and high multiplication factor. TANNER TSPICE simulation tool i...

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Bibliographic Details
Main Authors: Munir Ahmad Al-Absi, Abdulaziz Ahmed Al-Khulaifi
Format: Article
Language:English
Published: IEEE 2019-01-01
Series:IEEE Access
Subjects:
Impedance multiplier
filters
biomedical circuits
high multiplication factor
tunable
Online Access:https://ieeexplore.ieee.org/document/8808856/

Internet

https://ieeexplore.ieee.org/document/8808856/

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