Simulation and implementation on a FPGA of a channel encoder scheme for Wimax standard

<p>This paper describes the design, simulation and implementation on a FPGA of a channel encoder for Wimax, focusing on the IEEE 802.16-2004 standard which represents the fixed implementation and it is part of research in the field of fixed wireless access networks Broadband without line of si...

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Main Authors: José Andrés Marzo Icaza, Rebeca Leonor Estrada Pico
Format: Article
Language:English
Published: Universidad San Francisco de Quito 2011-06-01
Series:ACI Avances en Ciencias e Ingenierías
Subjects:
FEC
Online Access:http://revistas.usfq.edu.ec/index.php/avances/article/view/56
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spelling doaj-1a24e5f4069e4ddc9ab1b6a754bba7b32021-10-02T17:27:42ZengUniversidad San Francisco de QuitoACI Avances en Ciencias e Ingenierías1390-53842528-77882011-06-013110.18272/aci.v3i1.5656Simulation and implementation on a FPGA of a channel encoder scheme for Wimax standardJosé Andrés Marzo Icaza0Rebeca Leonor Estrada Pico1Escuela Superior Politécnica del LitoralEscuela Superior Politécnica del Litoral<p>This paper describes the design, simulation and implementation on a FPGA of a channel encoder for Wimax, focusing on the IEEE 802.16-2004 standard which represents the fixed implementation and it is part of research in the field of fixed wireless access networks Broadband without line of sight. The paper presents the main features used in Wimax for transmitting and receiving also the operation of each of the blocks used for error correction.</p><p>This project presents an implementation using FPGA-based design model, using the System Generator software with Matlab and Simulink, to obtain data that allow us to verify the operation of the proposed design according to the standard specifications and also analyze the ability for error correcting using BER vs. SNR curves and constellations to the channel output to justify the use of the system design.</p>http://revistas.usfq.edu.ec/index.php/avances/article/view/56WimaxFECcodificador de canalFPGAGenerador de sistema
collection DOAJ
language English
format Article
sources DOAJ
author José Andrés Marzo Icaza
Rebeca Leonor Estrada Pico
spellingShingle José Andrés Marzo Icaza
Rebeca Leonor Estrada Pico
Simulation and implementation on a FPGA of a channel encoder scheme for Wimax standard
ACI Avances en Ciencias e Ingenierías
Wimax
FEC
codificador de canal
FPGA
Generador de sistema
author_facet José Andrés Marzo Icaza
Rebeca Leonor Estrada Pico
author_sort José Andrés Marzo Icaza
title Simulation and implementation on a FPGA of a channel encoder scheme for Wimax standard
title_short Simulation and implementation on a FPGA of a channel encoder scheme for Wimax standard
title_full Simulation and implementation on a FPGA of a channel encoder scheme for Wimax standard
title_fullStr Simulation and implementation on a FPGA of a channel encoder scheme for Wimax standard
title_full_unstemmed Simulation and implementation on a FPGA of a channel encoder scheme for Wimax standard
title_sort simulation and implementation on a fpga of a channel encoder scheme for wimax standard
publisher Universidad San Francisco de Quito
series ACI Avances en Ciencias e Ingenierías
issn 1390-5384
2528-7788
publishDate 2011-06-01
description <p>This paper describes the design, simulation and implementation on a FPGA of a channel encoder for Wimax, focusing on the IEEE 802.16-2004 standard which represents the fixed implementation and it is part of research in the field of fixed wireless access networks Broadband without line of sight. The paper presents the main features used in Wimax for transmitting and receiving also the operation of each of the blocks used for error correction.</p><p>This project presents an implementation using FPGA-based design model, using the System Generator software with Matlab and Simulink, to obtain data that allow us to verify the operation of the proposed design according to the standard specifications and also analyze the ability for error correcting using BER vs. SNR curves and constellations to the channel output to justify the use of the system design.</p>
topic Wimax
FEC
codificador de canal
FPGA
Generador de sistema
url http://revistas.usfq.edu.ec/index.php/avances/article/view/56
work_keys_str_mv AT joseandresmarzoicaza simulationandimplementationonafpgaofachannelencoderschemeforwimaxstandard
AT rebecaleonorestradapico simulationandimplementationonafpgaofachannelencoderschemeforwimaxstandard
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