Providing Memory Management Abstraction for Self-Reconfigurable Video Processing Platforms

This paper presents a concept for an SDRAM controller targeting video processing platforms with dynamically reconfigurable processing units (RPUs). A priority-arbitration algorithm provides the required QoS and supports high bit-rate data streaming of multiple clients. Conforming to common video dat...

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Main Authors: Kurt Franz Ackermann, Burghard Hoffmann, Leandro Soares Indrusiak, Manfred Glesner
Format: Article
Language:English
Published: Hindawi Limited 2009-01-01
Series:International Journal of Reconfigurable Computing
Online Access:http://dx.doi.org/10.1155/2009/851613
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spelling doaj-18b078bf86374e3fb0a12e926d4ea5892020-11-24T23:04:56ZengHindawi LimitedInternational Journal of Reconfigurable Computing1687-71951687-72092009-01-01200910.1155/2009/851613851613Providing Memory Management Abstraction for Self-Reconfigurable Video Processing PlatformsKurt Franz Ackermann0Burghard Hoffmann1Leandro Soares Indrusiak2Manfred Glesner3Institute for Microelectronic Systems, Darmstadt University of Technology, Karlstrasse 15, 64283 Darmstadt, GermanyVITRONIC Dr.-Ing. Stein Bildverarbeitungssysteme GmbH, Hasengartenstr. 14, 65189 Wiesbaden, GermanyInstitute for Microelectronic Systems, Darmstadt University of Technology, Karlstrasse 15, 64283 Darmstadt, GermanyInstitute for Microelectronic Systems, Darmstadt University of Technology, Karlstrasse 15, 64283 Darmstadt, GermanyThis paper presents a concept for an SDRAM controller targeting video processing platforms with dynamically reconfigurable processing units (RPUs). A priority-arbitration algorithm provides the required QoS and supports high bit-rate data streaming of multiple clients. Conforming to common video data structures the controller organizes the memory in partitions, frames, lines, and pixels. The raised level of abstraction drastically reduces the complexity of clients' addressing logic. Its uniform interface structure facilitates instantiations in systems with various clients. In addition to SDRAM controllers for regular applications, special demands of reconfigurable platforms have to be satisfied. The aim of this work is to minimize the number of required bus macros leading to relaxed place and route constraints and reducing the number of critical design paths. A suitable interface protocol is presented, and fundamental implementation issues are outlined.http://dx.doi.org/10.1155/2009/851613
collection DOAJ
language English
format Article
sources DOAJ
author Kurt Franz Ackermann
Burghard Hoffmann
Leandro Soares Indrusiak
Manfred Glesner
spellingShingle Kurt Franz Ackermann
Burghard Hoffmann
Leandro Soares Indrusiak
Manfred Glesner
Providing Memory Management Abstraction for Self-Reconfigurable Video Processing Platforms
International Journal of Reconfigurable Computing
author_facet Kurt Franz Ackermann
Burghard Hoffmann
Leandro Soares Indrusiak
Manfred Glesner
author_sort Kurt Franz Ackermann
title Providing Memory Management Abstraction for Self-Reconfigurable Video Processing Platforms
title_short Providing Memory Management Abstraction for Self-Reconfigurable Video Processing Platforms
title_full Providing Memory Management Abstraction for Self-Reconfigurable Video Processing Platforms
title_fullStr Providing Memory Management Abstraction for Self-Reconfigurable Video Processing Platforms
title_full_unstemmed Providing Memory Management Abstraction for Self-Reconfigurable Video Processing Platforms
title_sort providing memory management abstraction for self-reconfigurable video processing platforms
publisher Hindawi Limited
series International Journal of Reconfigurable Computing
issn 1687-7195
1687-7209
publishDate 2009-01-01
description This paper presents a concept for an SDRAM controller targeting video processing platforms with dynamically reconfigurable processing units (RPUs). A priority-arbitration algorithm provides the required QoS and supports high bit-rate data streaming of multiple clients. Conforming to common video data structures the controller organizes the memory in partitions, frames, lines, and pixels. The raised level of abstraction drastically reduces the complexity of clients' addressing logic. Its uniform interface structure facilitates instantiations in systems with various clients. In addition to SDRAM controllers for regular applications, special demands of reconfigurable platforms have to be satisfied. The aim of this work is to minimize the number of required bus macros leading to relaxed place and route constraints and reducing the number of critical design paths. A suitable interface protocol is presented, and fundamental implementation issues are outlined.
url http://dx.doi.org/10.1155/2009/851613
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