Designing BEE: A Hardware Emulation Engine for Signal Processing in Low-Power Wireless Applications
<p/> <p>This paper describes the design of a large-scale emulation engine and an application example from the field of low-power wireless devices. The primary goal of the emulator is to support design space exploration of real-time algorithms. The emulator is customized for dataflow domi...
| Main Authors: | , , , , |
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| Format: | Article |
| Language: | English |
| Published: |
SpringerOpen
2003-01-01
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| Series: | EURASIP Journal on Advances in Signal Processing |
| Subjects: | |
| Online Access: | http://dx.doi.org/10.1155/S1110865703212154 |
| Summary: | <p/> <p>This paper describes the design of a large-scale emulation engine and an application example from the field of low-power wireless devices. The primary goal of the emulator is to support design space exploration of real-time algorithms. The emulator is customized for dataflow dominant architectures, especially focusing on telecommunication-related applications. Due to its novel routing architecture and application-specific nature, the emulator is capable of real-time execution of a class of algorithms in its application space. Moreover, the dataflow structure facilitates the development of a highly abstracted design flow for the emulator. Simulations and practical measurements on commercial development boards are used to verify that real-time emulation of a low-power TDMA receiver is feasible at a clock speed of 25 MHz.</p> |
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| ISSN: | 1687-6172 1687-6180 |