Design and implementation of high speed data transfer system between multi-core DSP and FPGA

Design and implementation of high speed data transfer system between multi-core DSP and FPGA

To meet the demands of large data volume, high transmission speed and high real-time computing performance in embedded image processing system, this paper proposes a high-speed data transmission storage system with multi-core DSP TMS320C 6678 as the core. Based on the DSP high-speed serial Rapid IO(...

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Bibliographic Details
Main Authors: Chen Shutao, Shen Zhi, Wang Chunlian, Hu Qi
Format: Article
Language:zho
Published: National Computer System Engineering Research Institute of China 2018-12-01
Series:Dianzi Jishu Yingyong
Subjects:
high-speed transmission
DSP
SRIO
interface interconnection
Online Access:http://www.chinaaet.com/article/3000094948
id doaj-12bd9421d95a4617b9da50d0db4c7f70
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spelling doaj-12bd9421d95a4617b9da50d0db4c7f702020-11-25T01:40:01ZzhoNational Computer System Engineering Research Institute of ChinaDianzi Jishu Yingyong0258-79982018-12-014412404310.16157/j.issn.0258-7998.1817913000094948Design and implementation of high speed data transfer system between multi-core DSP and FPGAChen Shutao0Shen Zhi1Wang Chunlian2Hu Qi3The 9th Designing of China Aerospace Science Industry Corp，Wuhan 430040，ChinaThe 9th Designing of China Aerospace Science Industry Corp，Wuhan 430040，ChinaThe 9th Designing of China Aerospace Science Industry Corp，Wuhan 430040，ChinaThe 9th Designing of China Aerospace Science Industry Corp，Wuhan 430040，ChinaTo meet the demands of large data volume, high transmission speed and high real-time computing performance in embedded image processing system, this paper proposes a high-speed data transmission storage system with multi-core DSP TMS320C 6678 as the core. Based on the DSP high-speed serial Rapid IO(SRIO) module for high-speed transmission of image data, using the SRIO module′s direct I/O transmission mode, using the 4x interface mode configuration, each interface transmission rate is 3.125 Gb/s, and theoretical transmission rate is 10 Gb/s. At the same time, DDR3 controller module is used to expand storage space and achieve shared storage of optical and radar images. The test results show that the SRIO high-speed transmission system designed has a transmission speed of more than 8Gb/s, which reaches more than 80% of the theoretical value, satisfies the high-speed transmission needs of large data, and effectively realizes data transmission and shared storage between multiple processors.http://www.chinaaet.com/article/3000094948high-speed transmissionDSPSRIOinterface interconnection
collection DOAJ
language zho
format Article
sources DOAJ
author Chen Shutao
Shen Zhi
Wang Chunlian
Hu Qi
spellingShingle Chen Shutao
Shen Zhi
Wang Chunlian
Hu Qi
Design and implementation of high speed data transfer system between multi-core DSP and FPGA
Dianzi Jishu Yingyong
high-speed transmission
DSP
SRIO
interface interconnection
author_facet Chen Shutao
Shen Zhi
Wang Chunlian
Hu Qi
author_sort Chen Shutao
title Design and implementation of high speed data transfer system between multi-core DSP and FPGA
title_short Design and implementation of high speed data transfer system between multi-core DSP and FPGA
title_full Design and implementation of high speed data transfer system between multi-core DSP and FPGA
title_fullStr Design and implementation of high speed data transfer system between multi-core DSP and FPGA
title_full_unstemmed Design and implementation of high speed data transfer system between multi-core DSP and FPGA
title_sort design and implementation of high speed data transfer system between multi-core dsp and fpga
publisher National Computer System Engineering Research Institute of China
series Dianzi Jishu Yingyong
issn 0258-7998
publishDate 2018-12-01
description To meet the demands of large data volume, high transmission speed and high real-time computing performance in embedded image processing system, this paper proposes a high-speed data transmission storage system with multi-core DSP TMS320C 6678 as the core. Based on the DSP high-speed serial Rapid IO(SRIO) module for high-speed transmission of image data, using the SRIO module′s direct I/O transmission mode, using the 4x interface mode configuration, each interface transmission rate is 3.125 Gb/s, and theoretical transmission rate is 10 Gb/s. At the same time, DDR3 controller module is used to expand storage space and achieve shared storage of optical and radar images. The test results show that the SRIO high-speed transmission system designed has a transmission speed of more than 8Gb/s, which reaches more than 80% of the theoretical value, satisfies the high-speed transmission needs of large data, and effectively realizes data transmission and shared storage between multiple processors.
topic high-speed transmission
DSP
SRIO
interface interconnection
url http://www.chinaaet.com/article/3000094948
work_keys_str_mv AT chenshutao designandimplementationofhighspeeddatatransfersystembetweenmulticoredspandfpga
AT shenzhi designandimplementationofhighspeeddatatransfersystembetweenmulticoredspandfpga
AT wangchunlian designandimplementationofhighspeeddatatransfersystembetweenmulticoredspandfpga
AT huqi designandimplementationofhighspeeddatatransfersystembetweenmulticoredspandfpga
_version_ 1725047595587338240

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