Design and implementation of high speed data transfer system between multi-core DSP and FPGA

• Main Authors: Chen Shutao, Shen Zhi, Wang Chunlian, Hu Qi
• Format: Article
• Language: zho
• Published: National Computer System Engineering Research Institute of China 2018-12-01
• Series: Dianzi Jishu Yingyong
• Subjects: high-speed transmission; DSP; SRIO; interface interconnection
• Online Access: http://www.chinaaet.com/article/3000094948
• ISSN: 0258-7998

To meet the demands of large data volume, high transmission speed and high real-time computing performance in embedded image processing system, this paper proposes a high-speed data transmission storage system with multi-core DSP TMS320C 6678 as the core. Based on the DSP high-speed serial Rapid IO(SRIO) module for high-speed transmission of image data, using the SRIO module′s direct I/O transmission mode, using the 4x interface mode configuration, each interface transmission rate is 3.125 Gb/s, and theoretical transmission rate is 10 Gb/s. At the same time, DDR3 controller module is used to expand storage space and achieve shared storage of optical and radar images. The test results show that the SRIO high-speed transmission system designed has a transmission speed of more than 8Gb/s, which reaches more than 80% of the theoretical value, satisfies the high-speed transmission needs of large data, and effectively realizes data transmission and shared storage between multiple processors.