A Benchmark Study of Complementary-Field Effect Transistor (CFET) Process Integration Options Done by Virtual Fabrication

A Benchmark Study of Complementary-Field Effect Transistor (CFET) Process Integration Options Done by Virtual Fabrication

Four process flow options for Complementary-Field Effect Transistors (C-FET), using different designs and starting substrates (Si bulk, Silicon-On-Insulator, or Double-SOI), were compared to assess the probability of process variation failures. The study was performed using virtual fabrication techn...

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Bibliographic Details
Main Authors: B. Vincent, J. Boemmels, J. Ryckaert, J. Ervin
Format: Article
Language:English
Published: IEEE 2020-01-01
Series:IEEE Journal of the Electron Devices Society
Subjects:
CMOS
CFET
DSOI
nanosheet
SOI
sensitivity analysis
Online Access:https://ieeexplore.ieee.org/document/9080101/

Internet

https://ieeexplore.ieee.org/document/9080101/

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