Double‐sided transistor device processability of carrierless ultrathin silicon wafers
Abstract Double‐sided metal‐oxide‐semiconductor field‐effect‐transistor processing is demonstrated for the first time on an ultrathin crystalline silicon substrate of 6‐20 μm in a 100 mm diameter wafer format without a carrier wafer, the thinnest free‐standing silicon wafers ever fabricated. The com...
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| Series: | InfoMat |
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| Online Access: | https://doi.org/10.1002/inf2.12087 |
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doaj-0d569acb0b51493db9caf5c226dc245e2020-11-25T03:29:39ZengWileyInfoMat2567-31652020-07-012473574210.1002/inf2.12087Double‐sided transistor device processability of carrierless ultrathin silicon wafersRuby A. Lai0Thomas M. Hymel1Bofei Liu2Yi Cui3Department of Physics Stanford University Stanford CaliforniaDepartment of Materials Science and Engineering Stanford University Stanford CaliforniaDepartment of Materials Science and Engineering Stanford University Stanford CaliforniaSLAC National Accelerator Laboratory Stanford Institute for Materials and Energy Sciences Menlo Park CaliforniaAbstract Double‐sided metal‐oxide‐semiconductor field‐effect‐transistor processing is demonstrated for the first time on an ultrathin crystalline silicon substrate of 6‐20 μm in a 100 mm diameter wafer format without a carrier wafer, the thinnest free‐standing silicon wafers ever fabricated. The compatibility of the flexible material with conventional semiconductor processing tools is enabled by supporting an interior ultrathin silicon with a surrounding thicker ring of silicon. Current‐voltage characteristics of transistors on ultrathin silicon show performance as expected from bulk silicon, with electron mobility ~1500 cm2 V−1 second−1. Mechanical measurements quantify the handleability.https://doi.org/10.1002/inf2.12087carrierless wafersflexible electronicsintegrated circuitsultrathin silicon |
| collection |
DOAJ |
| language |
English |
| format |
Article |
| sources |
DOAJ |
| author |
Ruby A. Lai Thomas M. Hymel Bofei Liu Yi Cui |
| spellingShingle |
Ruby A. Lai Thomas M. Hymel Bofei Liu Yi Cui Double‐sided transistor device processability of carrierless ultrathin silicon wafers InfoMat carrierless wafers flexible electronics integrated circuits ultrathin silicon |
| author_facet |
Ruby A. Lai Thomas M. Hymel Bofei Liu Yi Cui |
| author_sort |
Ruby A. Lai |
| title |
Double‐sided transistor device processability of carrierless ultrathin silicon wafers |
| title_short |
Double‐sided transistor device processability of carrierless ultrathin silicon wafers |
| title_full |
Double‐sided transistor device processability of carrierless ultrathin silicon wafers |
| title_fullStr |
Double‐sided transistor device processability of carrierless ultrathin silicon wafers |
| title_full_unstemmed |
Double‐sided transistor device processability of carrierless ultrathin silicon wafers |
| title_sort |
double‐sided transistor device processability of carrierless ultrathin silicon wafers |
| publisher |
Wiley |
| series |
InfoMat |
| issn |
2567-3165 |
| publishDate |
2020-07-01 |
| description |
Abstract Double‐sided metal‐oxide‐semiconductor field‐effect‐transistor processing is demonstrated for the first time on an ultrathin crystalline silicon substrate of 6‐20 μm in a 100 mm diameter wafer format without a carrier wafer, the thinnest free‐standing silicon wafers ever fabricated. The compatibility of the flexible material with conventional semiconductor processing tools is enabled by supporting an interior ultrathin silicon with a surrounding thicker ring of silicon. Current‐voltage characteristics of transistors on ultrathin silicon show performance as expected from bulk silicon, with electron mobility ~1500 cm2 V−1 second−1. Mechanical measurements quantify the handleability. |
| topic |
carrierless wafers flexible electronics integrated circuits ultrathin silicon |
| url |
https://doi.org/10.1002/inf2.12087 |
| work_keys_str_mv |
AT rubyalai doublesidedtransistordeviceprocessabilityofcarrierlessultrathinsiliconwafers AT thomasmhymel doublesidedtransistordeviceprocessabilityofcarrierlessultrathinsiliconwafers AT bofeiliu doublesidedtransistordeviceprocessabilityofcarrierlessultrathinsiliconwafers AT yicui doublesidedtransistordeviceprocessabilityofcarrierlessultrathinsiliconwafers |
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