A Proposal of Vertical MOSFET and Electrothermal Analysis for Monolithic 3-D ICs

In this paper, an innovative vertical MOSFET based on through-oxide via (TOV) technology is proposed for silicon-on-insulator (SOI)-based monolithic 3-D ICs. The proposed vertical MOSFET is investigated numerically. It was found that SOI can effectively reduce the parasitic capacitance, leakage curr...

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Bibliographic Details
Main Authors: Jia-He Zhu, Da-Wei Wang, Wen-Sheng Zhao, Jia-Yun Dai, Gaofeng Wang
Format: Article
Language:English
Published: MDPI AG 2021-09-01
Series:Electronics
Subjects:
Online Access:https://www.mdpi.com/2079-9292/10/18/2241
Description
Summary:In this paper, an innovative vertical MOSFET based on through-oxide via (TOV) technology is proposed for silicon-on-insulator (SOI)-based monolithic 3-D ICs. The proposed vertical MOSFET is investigated numerically. It was found that SOI can effectively reduce the parasitic capacitance, leakage current, power consumption, as well as suppress the pulse current interference of the substrate. The simulated results indicate that the proposed MOSFET possesses excellent characteristics in saturation current over 1500 μA, sub-threshold swing of 69 mV/dec, and <span style="font-variant: small-caps;">on</span>/<span style="font-variant: small-caps;">off</span> current ratio of 1.28 × 10<sup>11</sup>. Moreover, as temperature is a critical factor for the performance degradation of semiconductor devices, electrothermal simulations are conducted to predict the influence of the self-heating effect on device characteristics. The results show that device characteristics slightly deteriorate, but can still acceptable in their applications.
ISSN:2079-9292