| Summary: | This paper presents a uniform benchmarking methodology for non-Boolean computation based on the cellular neural network (CNN) for a variety of beyond-CMOS device technologies, including charge-based and spintronic devices. Three types of CNN implementations are investigated using analog, digital, and spintronic circuits. Monte Carlo simulations are performed to quantify the impact of the input noise, thermal noise, and the number of bits representing the weights of synapses on the overall recall probability and delay. The results demonstrate that the recall probability improves significantly as the number of synapses increase. Using a 4-b resolution for synapse weights provides the best tradeoff between the required numbers of synapses and synapse bits for a target recall rate. Finally, three types of CNN implementations with various device technologies are benchmarked for a given input noise and recall accuracy target. It is shown that spintronic devices are promising candidates to implement CNNs, where up to 3× energy-delay product improvement is predicted in domain wall devices compared to its conventional CMOS counterpart.
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