An Integrated Detection Circuit for Transmission Coefficients

As the applications of radio-frequency (RF) circuits continue to prosper, scattering parameters (S-parameters) play an essential role in the verification of a variety of chips. The traditional way to measure the S-parameters of RF integrated circuits (RFICs) is by using vector network analyzers (VNA...

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Main Authors: Ming-Che Lee, Chi-Yo Huang
Format: Article
Language:English
Published: IEEE 2020-01-01
Series:IEEE Access
Subjects:
Online Access:https://ieeexplore.ieee.org/document/8941034/
id doaj-0b3aaffd0ab342faa2a91a4d7ef47ecf
record_format Article
spelling doaj-0b3aaffd0ab342faa2a91a4d7ef47ecf2021-03-30T02:47:40ZengIEEEIEEE Access2169-35362020-01-01823725210.1109/ACCESS.2019.29619438941034An Integrated Detection Circuit for Transmission CoefficientsMing-Che Lee0Chi-Yo Huang1https://orcid.org/0000-0001-7673-6880Department of Mechanical Engineering, National Taipei University of Technology, Taipei, TaiwanDepartment of Industrial Education, National Taiwan Normal University, Taipei, TaiwanAs the applications of radio-frequency (RF) circuits continue to prosper, scattering parameters (S-parameters) play an essential role in the verification of a variety of chips. The traditional way to measure the S-parameters of RF integrated circuits (RFICs) is by using vector network analyzers (VNA). However, measuring RFICs with VNAs is very expensive and likely to reduce the profits of IC products. An implementation of the embedded circuit for S-parameter measurement can greatly reduce the costs of using expensive VNAs. Another reason to embed the circuit for S-parameter measurement is to increase the portion of a chip that can be measured. Besides, novel technologies, such as three-dimensional ICs, will require advanced methods for on-chip verifications of RF circuits since many RF nodes may be buried deep inside a chip stack. In view of these needs, this paper proposes a simple network that can realize on-chip S21 measurements. The greatest advantages of this circuit are the easy implementation and technology independence. To verify the feasibility of the circuit, we fabricated the test chips by using the 0.18-μm IBM 7RF process. The measurement results show the expected behavior and demonstrate the feasibility of the design concept.https://ieeexplore.ieee.org/document/8941034/Radio frequency (RF)S-parametersintegrated circuit (IC)vector network analyzer (VNA)automatic test equipment (ATE)divider (DIV)
collection DOAJ
language English
format Article
sources DOAJ
author Ming-Che Lee
Chi-Yo Huang
spellingShingle Ming-Che Lee
Chi-Yo Huang
An Integrated Detection Circuit for Transmission Coefficients
IEEE Access
Radio frequency (RF)
S-parameters
integrated circuit (IC)
vector network analyzer (VNA)
automatic test equipment (ATE)
divider (DIV)
author_facet Ming-Che Lee
Chi-Yo Huang
author_sort Ming-Che Lee
title An Integrated Detection Circuit for Transmission Coefficients
title_short An Integrated Detection Circuit for Transmission Coefficients
title_full An Integrated Detection Circuit for Transmission Coefficients
title_fullStr An Integrated Detection Circuit for Transmission Coefficients
title_full_unstemmed An Integrated Detection Circuit for Transmission Coefficients
title_sort integrated detection circuit for transmission coefficients
publisher IEEE
series IEEE Access
issn 2169-3536
publishDate 2020-01-01
description As the applications of radio-frequency (RF) circuits continue to prosper, scattering parameters (S-parameters) play an essential role in the verification of a variety of chips. The traditional way to measure the S-parameters of RF integrated circuits (RFICs) is by using vector network analyzers (VNA). However, measuring RFICs with VNAs is very expensive and likely to reduce the profits of IC products. An implementation of the embedded circuit for S-parameter measurement can greatly reduce the costs of using expensive VNAs. Another reason to embed the circuit for S-parameter measurement is to increase the portion of a chip that can be measured. Besides, novel technologies, such as three-dimensional ICs, will require advanced methods for on-chip verifications of RF circuits since many RF nodes may be buried deep inside a chip stack. In view of these needs, this paper proposes a simple network that can realize on-chip S21 measurements. The greatest advantages of this circuit are the easy implementation and technology independence. To verify the feasibility of the circuit, we fabricated the test chips by using the 0.18-μm IBM 7RF process. The measurement results show the expected behavior and demonstrate the feasibility of the design concept.
topic Radio frequency (RF)
S-parameters
integrated circuit (IC)
vector network analyzer (VNA)
automatic test equipment (ATE)
divider (DIV)
url https://ieeexplore.ieee.org/document/8941034/
work_keys_str_mv AT mingchelee anintegrateddetectioncircuitfortransmissioncoefficients
AT chiyohuang anintegrateddetectioncircuitfortransmissioncoefficients
AT mingchelee integrateddetectioncircuitfortransmissioncoefficients
AT chiyohuang integrateddetectioncircuitfortransmissioncoefficients
_version_ 1724184501276377088