Compact Model for L-Shaped Tunnel Field-Effect Transistor Including the 2D Region

The L-shaped tunneling field-effect transistor (LTFET) is the only line-tunneling type of TFET to be experimentally demonstrated. To date, there is no literature available on the compact model of LTFET. In this paper, a compact model of LTFET is presented. LTFET has both one-dimensional (1D) and 2D...

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Bibliographic Details
Main Authors: Faraz Najam, Yun Seop Yu
Format: Article
Language:English
Published: MDPI AG 2019-09-01
Series:Applied Sciences
Subjects:
Online Access:https://www.mdpi.com/2076-3417/9/18/3716
Description
Summary:The L-shaped tunneling field-effect transistor (LTFET) is the only line-tunneling type of TFET to be experimentally demonstrated. To date, there is no literature available on the compact model of LTFET. In this paper, a compact model of LTFET is presented. LTFET has both one-dimensional (1D) and 2D band-to-band tunneling (BTBT) components. The 2D BTBT part dominates in the subthreshold region, whereas the 1D BTBT dominates at higher gate-source biases. The model consists of 1D and 2D BTBT models. The 2D BTBT model is based on the assumption that the electric field originating from the gate and terminating at the source edge is perfectly circular. Tunneling path length is obtained by calculating the distance along an electric field arc that runs from gate to source. The 1D BTBT model is based on a simultaneous solution of the 1D Poisson equation in source and channel regions. Expressions for electric field and potential obtained from integrating the Poisson equation in source and channel regions are solved simultaneously to find the surface potential. Once the surface potential is known, all the other unknown variables, including junction potential and source depletion length, can be calculated. Using the potential profile, tunneling lengths were found for both the source-to-channel BTBT regime, and channel-to-channel BTBT regime. The tunneling lengths were used to calculate the BTBT tunneling rate, and finally, the drain-source current as a function of gate-source, and drain-source bias was calculated. The model results were compared against technology computer-aided design (TCAD) simulation results and were found to be in reasonable agreement for a compact model.
ISSN:2076-3417