M&M: Masks and Macs against Physical Attacks
Cryptographic implementations on embedded systems need to be protected against physical attacks. Today, this means that apart from incorporating countermeasures against side-channel analysis, implementations must also withstand fault attacks and combined attacks. Recent proposals in this area have...
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Ruhr-Universität Bochum
2018-11-01
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Series: | Transactions on Cryptographic Hardware and Embedded Systems |
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doaj-07fe3c50f51d4b8292a11ce0884d51752020-11-25T02:04:38ZengRuhr-Universität BochumTransactions on Cryptographic Hardware and Embedded Systems2569-29252018-11-012019110.13154/tches.v2019.i1.25-50M&M: Masks and Macs against Physical AttacksLauren De Meyer0Victor Arribas1Svetla Nikova2Ventzislav Nikov3Vincent Rijmen4KU Leuven, imec - COSICKU Leuven, imec - COSICKU Leuven, imec - COSICNXP SemiconductorsKU Leuven, imec - COSIC Cryptographic implementations on embedded systems need to be protected against physical attacks. Today, this means that apart from incorporating countermeasures against side-channel analysis, implementations must also withstand fault attacks and combined attacks. Recent proposals in this area have shown that there is a big tradeoff between the implementation cost and the strength of the adversary model. In this work, we introduce a new combined countermeasure M&M that combines Masking with information-theoretic MAC tags and infective computation. It works in a stronger adversary model than the existing scheme ParTI, yet is a lot less costly to implement than the provably secure MPC-based scheme CAPA. We demonstrate M&M with a SCA- and DFA-secure implementation of the AES block cipher. We evaluate the side-channel leakage of the second-order secure design with a non-specific t-test and use simulation to validate the fault resistance. https://tches.iacr.org/index.php/TCHES/article/view/7333 |
collection |
DOAJ |
language |
English |
format |
Article |
sources |
DOAJ |
author |
Lauren De Meyer Victor Arribas Svetla Nikova Ventzislav Nikov Vincent Rijmen |
spellingShingle |
Lauren De Meyer Victor Arribas Svetla Nikova Ventzislav Nikov Vincent Rijmen M&M: Masks and Macs against Physical Attacks Transactions on Cryptographic Hardware and Embedded Systems |
author_facet |
Lauren De Meyer Victor Arribas Svetla Nikova Ventzislav Nikov Vincent Rijmen |
author_sort |
Lauren De Meyer |
title |
M&M: Masks and Macs against Physical Attacks |
title_short |
M&M: Masks and Macs against Physical Attacks |
title_full |
M&M: Masks and Macs against Physical Attacks |
title_fullStr |
M&M: Masks and Macs against Physical Attacks |
title_full_unstemmed |
M&M: Masks and Macs against Physical Attacks |
title_sort |
m&m: masks and macs against physical attacks |
publisher |
Ruhr-Universität Bochum |
series |
Transactions on Cryptographic Hardware and Embedded Systems |
issn |
2569-2925 |
publishDate |
2018-11-01 |
description |
Cryptographic implementations on embedded systems need to be protected against physical attacks. Today, this means that apart from incorporating countermeasures against side-channel analysis, implementations must also withstand fault attacks and combined attacks. Recent proposals in this area have shown that there is a big tradeoff between the implementation cost and the strength of the adversary model. In this work, we introduce a new combined countermeasure M&M that combines Masking with information-theoretic MAC tags and infective computation. It works in a stronger adversary model than the existing scheme ParTI, yet is a lot less costly to implement than the provably secure MPC-based scheme CAPA. We demonstrate M&M with a SCA- and DFA-secure implementation of the AES block cipher. We evaluate the side-channel leakage of the second-order secure design with a non-specific t-test and use simulation to validate the fault resistance.
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url |
https://tches.iacr.org/index.php/TCHES/article/view/7333 |
work_keys_str_mv |
AT laurendemeyer mmmasksandmacsagainstphysicalattacks AT victorarribas mmmasksandmacsagainstphysicalattacks AT svetlanikova mmmasksandmacsagainstphysicalattacks AT ventzislavnikov mmmasksandmacsagainstphysicalattacks AT vincentrijmen mmmasksandmacsagainstphysicalattacks |
_version_ |
1724941982247157760 |