Design and implementation of fast and hardware‐efficient parallel processing elements to set full and partial permutations in Beneš networks
Abstract A new design for parallel and distributed processing elements (PEs) is proposed to configure Beneš networks based on a novel parallel algorithm that can realise full and partial permutations in a unified manner with very little overhead time and extra hardware. The proposed design reduces t...
| Main Authors: | , , |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
Wiley
2021-06-01
|
| Series: | The Journal of Engineering |
| Online Access: | https://doi.org/10.1049/tje2.12037 |