CMOS-NEMS Copper Switches Monolithically Integrated Using a 65 nm CMOS Technology

This work demonstrates the feasibility to obtain copper nanoelectromechanical (NEMS) relays using a commercial complementary metal oxide semiconductor (CMOS) technology (ST 65 nm) following an intra CMOS-MEMS approach. We report experimental demonstration of contact-mode nano-electromechanical switc...

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Main Authors: Jose Luis Muñoz-Gamarra, Arantxa Uranga, Nuria Barniol
Format: Article
Language:English
Published: MDPI AG 2016-02-01
Series:Micromachines
Subjects:
Online Access:http://www.mdpi.com/2072-666X/7/2/30
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spelling doaj-03b4c706c6474ae5923e3e026ca45e152020-11-24T23:48:08ZengMDPI AGMicromachines2072-666X2016-02-01723010.3390/mi7020030mi7020030CMOS-NEMS Copper Switches Monolithically Integrated Using a 65 nm CMOS TechnologyJose Luis Muñoz-Gamarra0Arantxa Uranga1Nuria Barniol2Department of Electronics Engineering, Universitat Autònoma de Barcelona (UAB), Barcelona 08193, SpainDepartment of Electronics Engineering, Universitat Autònoma de Barcelona (UAB), Barcelona 08193, SpainDepartment of Electronics Engineering, Universitat Autònoma de Barcelona (UAB), Barcelona 08193, SpainThis work demonstrates the feasibility to obtain copper nanoelectromechanical (NEMS) relays using a commercial complementary metal oxide semiconductor (CMOS) technology (ST 65 nm) following an intra CMOS-MEMS approach. We report experimental demonstration of contact-mode nano-electromechanical switches obtaining low operating voltage (5.5 V), good ION/IOFF (103) ratio, abrupt subthreshold swing (4.3 mV/decade) and minimum dimensions (3.50 μm × 100 nm × 180 nm, and gap of 100 nm). With these dimensions, the operable Cell area of the switch will be 3.5 μm (length) × 0.2 μm (100 nm width + 100 nm gap) = 0.7 μm2 which is the smallest reported one using a top-down fabrication approach.http://www.mdpi.com/2072-666X/7/2/30CMOS-NEMSNEMSNEMS switchcopper switch
collection DOAJ
language English
format Article
sources DOAJ
author Jose Luis Muñoz-Gamarra
Arantxa Uranga
Nuria Barniol
spellingShingle Jose Luis Muñoz-Gamarra
Arantxa Uranga
Nuria Barniol
CMOS-NEMS Copper Switches Monolithically Integrated Using a 65 nm CMOS Technology
Micromachines
CMOS-NEMS
NEMS
NEMS switch
copper switch
author_facet Jose Luis Muñoz-Gamarra
Arantxa Uranga
Nuria Barniol
author_sort Jose Luis Muñoz-Gamarra
title CMOS-NEMS Copper Switches Monolithically Integrated Using a 65 nm CMOS Technology
title_short CMOS-NEMS Copper Switches Monolithically Integrated Using a 65 nm CMOS Technology
title_full CMOS-NEMS Copper Switches Monolithically Integrated Using a 65 nm CMOS Technology
title_fullStr CMOS-NEMS Copper Switches Monolithically Integrated Using a 65 nm CMOS Technology
title_full_unstemmed CMOS-NEMS Copper Switches Monolithically Integrated Using a 65 nm CMOS Technology
title_sort cmos-nems copper switches monolithically integrated using a 65 nm cmos technology
publisher MDPI AG
series Micromachines
issn 2072-666X
publishDate 2016-02-01
description This work demonstrates the feasibility to obtain copper nanoelectromechanical (NEMS) relays using a commercial complementary metal oxide semiconductor (CMOS) technology (ST 65 nm) following an intra CMOS-MEMS approach. We report experimental demonstration of contact-mode nano-electromechanical switches obtaining low operating voltage (5.5 V), good ION/IOFF (103) ratio, abrupt subthreshold swing (4.3 mV/decade) and minimum dimensions (3.50 μm × 100 nm × 180 nm, and gap of 100 nm). With these dimensions, the operable Cell area of the switch will be 3.5 μm (length) × 0.2 μm (100 nm width + 100 nm gap) = 0.7 μm2 which is the smallest reported one using a top-down fabrication approach.
topic CMOS-NEMS
NEMS
NEMS switch
copper switch
url http://www.mdpi.com/2072-666X/7/2/30
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AT arantxauranga cmosnemscopperswitchesmonolithicallyintegratedusinga65nmcmostechnology
AT nuriabarniol cmosnemscopperswitchesmonolithicallyintegratedusinga65nmcmostechnology
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