Formal Analysis of Soft Errors using Theorem Proving

Modeling and analysis of soft errors in electronic circuits has traditionally been done using computer simulations. Computer simulations cannot guarantee correctness of analysis because they utilize approximate real number representations and pseudo random numbers in the analysis and thus are not we...

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Main Authors: Sofiène Tahar, Osman Hasan, Naeem Abbasi
Format: Article
Language:English
Published: Open Publishing Association 2013-07-01
Series:Electronic Proceedings in Theoretical Computer Science
Online Access:http://arxiv.org/pdf/1307.8213v1
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spelling doaj-02c4a7089823437088914c8222bcdfdf2020-11-24T23:34:36ZengOpen Publishing AssociationElectronic Proceedings in Theoretical Computer Science2075-21802013-07-01122Proc. SCSS 2012758410.4204/EPTCS.122.7Formal Analysis of Soft Errors using Theorem ProvingSofiène TaharOsman HasanNaeem AbbasiModeling and analysis of soft errors in electronic circuits has traditionally been done using computer simulations. Computer simulations cannot guarantee correctness of analysis because they utilize approximate real number representations and pseudo random numbers in the analysis and thus are not well suited for analyzing safety-critical applications. In this paper, we present a higher-order logic theorem proving based method for modeling and analysis of soft errors in electronic circuits. Our developed infrastructure includes formalized continuous random variable pairs, their Cumulative Distribution Function (CDF) properties and independent standard uniform and Gaussian random variables. We illustrate the usefulness of our approach by modeling and analyzing soft errors in commonly used dynamic random access memory sense amplifier circuits.http://arxiv.org/pdf/1307.8213v1
collection DOAJ
language English
format Article
sources DOAJ
author Sofiène Tahar
Osman Hasan
Naeem Abbasi
spellingShingle Sofiène Tahar
Osman Hasan
Naeem Abbasi
Formal Analysis of Soft Errors using Theorem Proving
Electronic Proceedings in Theoretical Computer Science
author_facet Sofiène Tahar
Osman Hasan
Naeem Abbasi
author_sort Sofiène Tahar
title Formal Analysis of Soft Errors using Theorem Proving
title_short Formal Analysis of Soft Errors using Theorem Proving
title_full Formal Analysis of Soft Errors using Theorem Proving
title_fullStr Formal Analysis of Soft Errors using Theorem Proving
title_full_unstemmed Formal Analysis of Soft Errors using Theorem Proving
title_sort formal analysis of soft errors using theorem proving
publisher Open Publishing Association
series Electronic Proceedings in Theoretical Computer Science
issn 2075-2180
publishDate 2013-07-01
description Modeling and analysis of soft errors in electronic circuits has traditionally been done using computer simulations. Computer simulations cannot guarantee correctness of analysis because they utilize approximate real number representations and pseudo random numbers in the analysis and thus are not well suited for analyzing safety-critical applications. In this paper, we present a higher-order logic theorem proving based method for modeling and analysis of soft errors in electronic circuits. Our developed infrastructure includes formalized continuous random variable pairs, their Cumulative Distribution Function (CDF) properties and independent standard uniform and Gaussian random variables. We illustrate the usefulness of our approach by modeling and analyzing soft errors in commonly used dynamic random access memory sense amplifier circuits.
url http://arxiv.org/pdf/1307.8213v1
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