LOW POWER AND HIGH PERFORMANCE SHIFT REGISTERS USING PULSED LATCH TECHNIQUE

by Vandana Niranjan
Published 2018-01-01

HIGH PERFORMANCE WALLACE TREE MULTIPLIER USING IMPROVED ADDER

by Meenali Janveja, Vandana Niranjan
Published 2017-04-01

PERFORMANCE IMPROVEMENT OF REVERSIBLE LOGIC ADDER

by Richa Shukla, Vandana Niranjan
Published 2016-07-01

POWER EFFICIENT HIGH SPEED ADAPTIVE BIASED OPERATIONAL AMPLIFIER

by Nimeesha, Shikha Soni, Vandana Niranjan, Ashwni Kumar
Published 2018-04-01

IMPROVING BANDWIDTH OF FLIPPED VOLTAGE FOLLOWER USING GATE-BODY DRIVEN TECHNIQUE

by VANDANA NIRANJAN, ASHWANI KUMAR, SHAIL BALA JAIN
Published 2017-01-01