Showing 1 - 20 results of 60 for search 'Shyh-jye Jou', query time: 0.11s Refine Results
  1. 1
    Design and Implementation of the high-accuracy control system
    by Shyh-Jye Jou, 周世傑
    Published 2005
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  2. 2
    90nm Mixed-Threshold Voltage Standard Cell Library Design and Characterization
    by Jyun-Yi Lin, 林俊誼　
    Published 2007
    Other Authors: “...Shyh-Jye Jou...”
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  3. 3
    A Spread Spectrum Clock Generator for Serial ATA 6Gb/s Application
    by HUANG YEN YING, 黃彥穎
    Published 2007
    Other Authors: “...Shyh-Jye Jou...”
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  4. 4
    Clock and Data Recovery for Spread Spectrum Clock using Multiple Alternating Edge Sampling
    by Yuan-Pu Cheng, 鄭元樸
    Published 2007
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  5. 5
    Multirate Multistage Digital FIR Filter / Decimator / Interpolator Module Generator
    by Hsiao-Yun Chen, 陳筱筠
    Published 2004
    Other Authors: “...Shyh-Jye Jou...”
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  6. 6
    Embedded DSP Processor Module Generatorand Its IP and Communication System Applications
    by Bo-Shiang Huang, 黃柏翔
    Published 2004
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  7. 7
    Serial Link Receiver Design and Implementation
    by Yen-Yin Wang, 王妍尹
    Published 2004
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  8. 8
    8Gbps Serial Link Transmitter with Adaptive Termination Resistors and Pre-Emphasis
    by Chih-Ning Chen, 陳志寧
    Published 2004
    Other Authors: “...Shyh-Jye Jou...”
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  9. 9
    Design and Implementation of Low Jitter Logic Blocks
    by Chang-Hsiao Tsai, 蔡昌孝
    Published 2004
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  10. 10
    Standard Cell Library Noise Characterization and Power Noise Suppression Circuit Design
    by Ming-Hsien Tu, 杜明賢
    Published 2006
    Other Authors: “...Shyh-Jye Jou...”
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  11. 11
    Design and Implementation of Multi-Giga Bit Parallel Adaptive Decision Feedback Equalizer
    by Chi-Shiung Lin, 林志雄
    Published 2006
    Other Authors: “...Shyh-Jye Jou...”
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  12. 12
    Nanometer CMOS On Chip Serial Link Transmitter
    by You-Jiun Wang, 王又君
    Published 2005
    Other Authors: “...Shyh-Jye Jou...”
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  13. 13
    Parameterized DSP Core for Communication System
    by YA-LAN TSAO, 曹亞嵐
    Published 2005
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  14. 14
    Parameterized and Embedded DSP Corefor Communication Applications
    by Ming-Hsuan Tan, 譚明烜
    Published 2002
    Other Authors: “...Shyh-Jye Jou...”
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  15. 15
    A UNIFIED DESIGN FRAMEWORK OF HIGH-SPEED/LOW-COST ROTATION ENGINES:AN ANGLE QUANTIZATION PERSPECTIVE
    by Cheng-Shing Wu, 吳政勳
    Published 2002
    Other Authors: “...Shyh-Jye Jou...”
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  16. 16
    Module Generator of Data Recovery Circuits Using Oversampling Technique
    by Yen-Hung Chen, 陳彥宏
    Published 2002
    Other Authors: “...Shyh-Jye Jou...”
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  17. 17
    5Gbps serial link transceiver with pre-emphasis
    by Chun-Hong Wang, 王長弘
    Published 2002
    Other Authors: “...Shyh-Jye Jou...”
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  18. 18
    Parameterized and Embedded DSP Datapath for Communication Systems
    by Jun-Xian Teng, 鄧君賢
    Published 2002
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  19. 19
    Multi-Gbps Equalizer Technology for Serial Link System
    by Yu-Sam Huang, 黃喻暄
    Published 2008
    Other Authors: “...Shyh-Jye Jou...”
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  20. 20
    Design of FFT Processor with Parallel-In-Parallel-Out in Normal Order
    by Hsiang-Sheng Hu, 胡祥甡
    Published 2008
    Other Authors: “...Shyh-Jye Jou...”
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