Showing 1 - 5 results of 5 for search 'Lo Hao-Yung', query time: 0.02s Refine Results
  1. 1
    VLSI Implementations of High-Speed Signed RNS Multipliers
    by Chen, Jian-Da, 陳健達
    Published 1997
    Other Authors: “...Lo Hao-Yung...”
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  2. 2
    An Implementation and Improvement Method of 32-Bit Logarithmic Multiplier and Divider by Four Partitioned Hubrid Roms Look-up Table Strategy
    by Hor, Yang Uang, 何永源
    Published 1994
    Other Authors: “...Lo, Hao Yung...”
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  3. 3
    A New Method of Implementation of VLSI CORDIC for Sine and Cosine Computation
    by Yang, Kuen Shiuh, 楊昆緒
    Published 1994
    Other Authors: “...Lo, Hao Yung...”
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  4. 4
    VLSI Design and Implementation of Pipelined Two's Complement Multiplier
    by Liu, Fun Jen, 劉方正
    Published 1994
    Other Authors: “...Lo, Hao Yung...”
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  5. 5
    ASIC Design and Implementation of 32-Bit LNS Addition and Subtraction Processor
    by Peng, Yi Xiong, 彭義雄
    Published 1994
    Other Authors: “...Lo, Hao Yung...”
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