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Huang,Tsung-Chu
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Huang,Tsung-Chu
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Huang,Tsung-Chu
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1
A mA2DPC Construction of OLS Codes for Multi-Cluster Error Correction for OS-MLD TSVs in 3D-ICs
by
Li, Yi-Shan
,
李宜珊
Published 2018
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...
Huang
,
Tsung
-
chu
...
”
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2
Fault-Correlation Reduction Technique and Analysis for Multiple Module Redundancy - with a Case Study using CORDIC-based FFT
by
Lin, Ching-Wei
,
林靖崴
Published 2018
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Huang
,
Tsung
-
Chu
...
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3
A Precomputation-based Remapping Architecture for Hypercube-based Multidimensional Memory
by
Lin,Bo-Shun
,
林柏勳
Published 2016
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...
Huang
,
Tsung
-
Chu
...
”
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4
A Dual-Symptom Aging Monitor for Data-Delivery TSVs in 3D-ICs
by
Chen,Jhen-Sing
,
陳振興
Published 2017
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Huang
,
Tsung
-
Chu
...
”
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5
A Defect-Tolerant Multi-TSV Structure and Placement for Power-Grids in 3D ICs
by
Li,Kun-Yuan
,
李堃淵
Published 2017
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Huang
,
Tsung
-
Chu
...
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6
Multiple-TSV Schemes for Defect-Tolerant Clock-Delivery TSVs in 3D ICs
by
Lin,Yu-Chien
,
林毓乾
Published 2017
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Huang
,
Tsung
-
Chu
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7
Zero-Latency Cluster-Error Correction and Reliability Analyses for TSVs in 3D ICs
by
Yi-Sheng Lin
,
林易生
Published 2016
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Huang
,
Tsung
-
Chu
...
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