A variation tolerant data dependent clock gating approach for PSN attenuated low power digital IC

by Pritam Bhattacharjee, Dhiraj Sarkar, Alak Majumder
Published 2019-09-01

A GRAPHICAL APPROACH TO DESIGN AND OPTIMIZATION OF MOS AMPLIFIER

by PAROMITA BHATTCHARJEE, ABIR J. MONDAL, ALAK MAJUMDER
Published 2018-01-01

A hybrid design approach of PVT tolerant, power efficient ring VCO

by Madhusudan Maiti, Suraj Kumar Saw, Abir Jyoti Mondal, Alak Majumder
Published 2020-06-01