A Power Efficiency Enhancements of a Multi-Bit Accelerator for Memory Prohibitive Deep Neural Networks

by Suhas Shivapakash, Hardik Jain, Olaf Hellwich, Friedel Gerfers
Published 2021-01-01

FantastIC4: A Hardware-Software Co-Design Approach for Efficiently Running 4Bit-Compact Multilayer Perceptrons

by Simon Wiedemann, Suhas Shivapakash, Daniel Becking, Pablo Wiedemann, Wojciech Samek, Friedel Gerfers, Thomas Wiegand
Published 2021-01-01