Modeling crosstalk effects in CNT bus architectures

by Rossi, Daniele, Cazeaux, Jose Manuel, Metra, Cecilia, Lombardi, Fabrizio
Published 2007

Clock faults induced min and max delay violations

by Rossi, Daniele, Omana, Martin, Cazeaux, Jose' Manuel, Mak, T.M
Published 2014

Accurate linear model for SET critical charge estimation

by Rossi, Daniele, Cazeaux, Jose' Manuel, Omana, Martin, Metra, Cecilia, Chatterjee, Abhijit
Published 2009